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DEMO - Introduction to FPGA Design for Embedded Systems
DEMO - Introduction to FPGA Design for Embedded Systems Computer Software Engineering Tools Courses |
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About this course: Programmable Logic has become more and more common as a core technology used to build electronic systems. By integrating soft-core or hardcore processors, these devices have become complete systems on a chip, steadily displacing general purpose processors and ASICs. In particular, high performance systems are now almost always implemented with FPGAs. This course will give you the foundation for FPGA design in Embedded Systems along with practical design skills. You will learn what an FPGA is and how this technology was developed, how to select the best FPGA architecture for a given application, how to use state of the art software tools for FPGA development, and solve critical digital design problems using FPGAs. You use FPGA development tools to complete several example designs, including a custom processor. If you are thinking of a career in Electronics Design or an engineer looking at a career change, this is a great course to enhance your career opportunities. Hardware Requirements: You must have access to computer resources to run the development tools, a PC running either Windows 7, 8, or 10 or a recent Linux OS which must be RHEL 6.5 or CentOS Linux 6.5 or later. Either Linux OS could be run as a virtual machine under Windows 8 or 10. The tools do not run on Apple Mac computers. Whatever the OS, the computer must have at least 8 GB of RAM. Most new laptops will have this, or it may be possible to upgrade the memory. Who is this class for: This course is for anyone with a solid background in digital electronics and logic design, including engineering students; design engineers with either an electrical engineering, mechanical engineering, or computer science background; test engineers; systems engineers; and engineering managers supervising people doing FPGA design work. Later courses in the specialization also require college-level C programming skills. Syllabus WEEK 1 What's this programmable logic stuff anyway? History and Architecture What's this programmable logic stuff anyway? In Module 1 you learn about the history and architecture of programmable logic devices including Field Programmable Gate Arrays (FPGAs). You will learn how to describe the difference between an FPGA, a CPLD, an ASSP, and an ASIC, recite the historical development of programmable logic devices; and design logic circuits using LUTs. Examples will include designs of digital adders and multipliers in FPGAs. More 9 videos, 4 readings Video: Course Introduction Video: Course Overview Reading: About This Course Reading: Hardware Requirements Video: 1. Welcome to the world of programmable logic and FPGA design Reading: Week 1 Suggested Readings Video: 2. A Brief History of Programmable Logic Video: 3. CPLD Architecture Video: 4. LUTs and FPGA Architecture Discussion Prompt: Look-up Tables vs. Gates Video: 5. LUTs for Logic Design Video: 6. Designing Adders Video: 7. Designing Multipliers Reading: Release of Week 2 Files Show less Graded: Mission 001: Week 1 Application Assignment Graded: Mission 002: Week 1 Quiz WEEK 2 FPGA Design Tool Flow; An Example Design In Module 2 you will install and use sophisticated FPGA design tools to create an example design. You will learn the steps in the standard FPGA design flow, how to use Intel Altera’s Quartus Prime Development Suite to create a pipelined multiplier, and how to verify the integrity of the design using the RTL Viewer and by simulation using ModelSim. Using the TimeQuest timing analyzer, you will analyze the timing of your design to achieve timing closure. More 11 videos, 1 reading, 1 practice quiz Video: 1. The FPGA Design Flow Reading: Week 2 Suggested Readings Video: 2. Downloading Quartus Prime Video: 3. Installing Quartus Prime Video: 4. Introducing Quartus Prime Video: 5. Create a design project in Quartus Prime Video: 6. Create a design in Quartus Prime Video: 7. Compile a Design Video: 8. View the RTL Video: 9. Timing Analysis with Time Quest I Video: 10. Timing Analysis with Time Quest II Video: 11. Simulate a design with ModelSim Practice Quiz: Mission 003 : Practice Opportunity Show less Graded: Mission 004: Week 2 Application Assignment Graded: Mission 005: Week 2 Quiz WEEK 3 FPGA Architectures: SRAM, FLASH, and Anti-fuse FPGAs are programmable, and the program resides in a memory which determines how the logic and routing in the device is configured. In Module 3 you will learn the pros and cons of FLASH-based, SRAM-based, and Anti-Fuse based FPGAs. A survey of modern FPGA architectures will give you the tools to determine which type of FPGA is the best fit for a design. Architectures will be explored from the basic core logic cell up to consideration of large Intellectual Property (IP) blocks that are available on many FPGAs. More 8 videos, 2 readings Video: 1. Many types of FPGAs Reading: Week 3 Suggested Readings Video: 2. Xilinx CPLD Architecture Video: 3. Xilinx Small FPGAs Video: 4. Xilinx Large FPGAs Video: 5. Altera CPLDs and Small FPGAs Discussion Prompt: Intel/Altera MAX10 Video: 6. Altera Large FPGAs Video: 7. Microsemi Single-chip FPGA solutions Discussion Prompt: FLASH Configuration Memory in Microsemi FPGAs Video: 8. Lattice Single-Chip FPGA solutions Reading: Release of Week 4 Files Show less Graded: Mission 006: Week 3 Quiz WEEK 4 Programmable logic design using schematic entry design tools In module 4 you will extend and enhance your design from module 2, completing the design by adding IP blocks, implementing pin assignments and creating a programming file for the FPGA. One outcome will be improved design productivity, by use of design techniques like pipelining, and by the use of system design tools like Qsys, the system design tool in Quartus Prime. You will complete a Qsys system design by creating a NIOS II softcore processor design, which quickly gives you the powerful ability to customize a processor to meet your specific needs. More 10 videos, 1 reading Video: 1. FPGA Design Expertise Reading: Week 4 Suggested Readings Video: 2. Advanced Schematic Entry for FPGA Design- Drawing and Hierarchy Video: 3. Improving Productivity with IP Blocks Video: 4. Improving Timing with Pipelining Discussion Prompt: Pipelines and IP blocks Video: 5. FPGA IO: Getting In and Getting Out Video: 6. Pin Assignments: Making them Spot On! Video: 7. Programming the FPGA Video: 8. Becoming one with Q: Qsys System Design Video: 9.a Becoming one with Q Part II: Qsys System Design Finishing Touches Video: 9.b Becoming one with Q Part III: Qsys System Design Finishing Touches |
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